The present invention relates to semiconductor device, and more specifically, to fin-type field effect transistor (finFET) devices.
Semiconductor devices such as finFETs, for example, are known to include stressor elements to improve device performance. For instance, stressor elements are typically epitaxially grown on an upper surface of the bulk substrate reserved for forming source/drain elements, e.g., raised source/drain elements. The crystalline lattice differential between the stressor element (e.g., SiGe) and the underlying semiconductor material (e.g., Si) induces a strain on the source/drain element that allows for increased hole mobility therethrough to improve device performance, in the example case of a p-type FET or PFET device. However, epitaxially growing material from the upper surface of the substrate creates non-uniform and multi-crystalline raised source/drain elements. As a result, complications and process variations may occur during further processing due to the non-uniformity and seams between multiple single crystalline portions.